Differences

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--- jtag [2016/01/12 15:26] – created kingkevin
+++ jtag [2016/02/17 10:22] – fix JTAG to SWJ, restructure kingkevin
@@ Line 1: / Line 1: @@
-Here I will describe my experiences with JTAG and how I use it.
+JTAG is a technology to test integrated circuits, mostly micro-controllers and CPUs.
+It allows to do hardware debugging: read/write memory, control I/Os, and debug running code.\\
-JTAG is a technology to test electronics.
+SWD is a more modern version of JTAG and only requires 2 pins instead of 4[+1].\\
-It allows to do hardware debugging: test I/O, flash firmwares, step through assembly code, ...
+SWJ is a combination of Serial Wire Debug (SWD) and JTAG.
+But they provide the same logical functions.
 On one side this functionality must be included in the target device.
-Most 32 bits micro-controllers and SoCs have it.\\
+The Debug Port is often called JTAG-DP for JTAG and SW-DP for SWD.
-On the other side you need a JTAG adapter so the host can speak to the device using the JTAG protocol.
+SWJ capable device include and often combine both, as the SWD signal pins SWDIO and SWCLK re-use the JTAG signal pin JTMS and JTCK (backwards compatible).
-JTAG adapters can go from cheap (<5$) to expensive (>1000$), depending on the quality of the hardware and software.
-===== JTAG adapters =====
+Most 32 bits micro-controllers and SoCs have one of both (or both).\\
+On the other side you need a SWJ adapter so the host can speak to the device using the JTAG and/or SWD protocol.
+SWJ adapters can go from cheap (<5$) to expensive (>1000$), depending on the quality of the hardware and software.
-These are the main JTAG adapters I am using.
+====== SWJ adapters ======
-==== ST-Link v2 (clone) ====
+These are the main SWJ adapters I am using.
+===== ST-Link v2 =====
 The [[http://www.st.com/web/catalog/tools/FM146/CL1984/SC724/SS1677/PF251168|ST-LINK/V2]] is from STMicroelectronics, and is very convenient to flash their STM8 and STM32 micro-controllers, such as the [[stm32f1xx|STM32 F1 series]].
+It supports JTAG, SWD, and SWIM (for STM8).
-I have two cheap clones:
+These SWJ adapters are based STM32F1xx ARM Cortex M3 micro-controllers.
-  * one from [[http://www.aliexpress.com/item/Free-Shipping-1SET-ST-Link-st-link-V2-for-STM8S-STM8L-STM32-Cortex-M0-Cortex-M3/1758613434.html|BAITE]]
-{{:jtag:dsc02404.jpg?0x100|device front}}
-{{:jtag:dsc02405.jpg?0x100|device back}}
-{{:jtag:dsc02403.jpg?0x100|PCB front}}
-{{:jtag:dsc02406.jpg?0x100|pinout sticker}}
-{{:jtag:st-link_v2_baite.svg?0x100|pinout}}
-  * one [[http://www.aliexpress.com/item/Hot-Sale-1PCS-ST-LINK-Stlink-ST-Link-V2-Mini-STM8-STM32-Simulator-Download-Programmer-Programming/32343514985.html|more generic]]
-{{:jtag:dsc02407.jpg?0x100|device front}}
-{{:jtag:dsc02408.jpg?0x100|device back}}
-{{:jtag:dsc02415.jpg?0x100|PCB front}}
-{{:jtag:dsc02410.jpg?0x100|PCB back}}
-These devices use the Serial Wire Debug (SWD) protocol.
-This is newer variant of JTAG which requires only 2 signal lines instead of 4+.
-But but aware, they both have different pinouts on the connector.
-These JTAG adapter are based STM32F1xx ARM Cortex M3 micro-controllers.
 And ironically enough I in turn use them to program and debug STM32F1xx ARM Cortex M3 micro-controllers.
@@ Line 40: / Line 28: @@
 This has only to be done once, before the device is plugged in to be used:
 <code bash>
-echo -n 'STM32F1xx ARM Cortex M3 micro-controllers' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules
+echo -n 'ST-Link V2 SWJ adapter' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules
 echo -n 'ATTR{idVendor}=="0483", ATTR{idProduct}=="3748", MODE="0666"' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules
 sudo udevadm control --reload-rules
@@ Line 67: / Line 55: @@
 </code>
-==== Altera USB-Blaster (clone) ====
+I am using cheap clones.
+==== BAITE ====
+The first clone is a [[http://www.aliexpress.com/item/Free-Shipping-1SET-ST-Link-st-link-V2-for-STM8S-STM8L-STM32-Cortex-M0-Cortex-M3/1758613434.html|BAITE]] ST-Link V2.
+It supports JTAG, SWD, and SWIM (for STM8).
+{{:jtag:dsc02404.jpg?0x100|device front}}
+{{:jtag:dsc02405.jpg?0x100|device back}}
+{{:jtag:dsc02403.jpg?0x100|PCB front}}
+{{:jtag:dsc02406.jpg?0x100|pinout sticker}}
+{{:jtag:st-link_v2_baite.svg?0x100|pinout}}
+STM32F103C8 connection:
+^ STM32F103C8 signal ^ STM32F103C8 pin ^ adapter pin ^ adapter signal ^
+| PA7 | 17 | 1 | JRST |
+| AMS1117 |  | 2 | 3V3 |
+| USB VCC |  | 3 | 5V |
+| PA4 | 14 | 4 | JTCK/SWCLK |
+| PB11 | 22 | 5 | SWIM |
+| PA14 | 37 | 6 | JTMS/SWDIO |
+| USB GND |  | 7 | GND |
+| PA5 | 15 | 8 | JTDO |
+| PB6 | 42 | 9 | SWIM_RST |
+| PA6  | 16 | 10 | JTDI |
+| PB12,PB14 | 25,27 |  |  100 ohms |
+| PB5 | 41 |  | LED |
+the adapter pins are protected with a 220 ohms resistor.
+==== aluminium ====
+This [[http://www.aliexpress.com/item/Hot-Sale-1PCS-ST-LINK-Stlink-ST-Link-V2-Mini-STM8-STM32-Simulator-Download-Programmer-Programming/32343514985.html|one]] comes in aluminium case.
+It supports SWD, and SWIM (for STM8), but not JTAG.
+They replaced the additional JTAG pins with power pins.
+{{:jtag:dsc02407.jpg?0x100|device front}}
+{{:jtag:dsc02408.jpg?0x100|device back}}
+{{:jtag:dsc02415.jpg?0x100|PCB front}}
+{{:jtag:dsc02410.jpg?0x100|PCB back}}
+STM32F103C8 connection:
+^ STM32F103C8 signal ^ STM32F103C8 pin ^ adapter pin ^ adapter signal ^
+| PB6 | 42 | 1 | RST |
+| PB14 | 27 | 2 | SWDIO |
+| USB GND |  | 3 | GND |
+| USB GND |  | 4 | GND |
+| PB8/PB11 | 45/22 | 5 | SWIM |
+| PA5/PB13 | 15/26 | 6 | SWCLK |
+| LDO VCC |  | 7 | 3.3V |
+| LDO VCC |  | 8 | 3.3V |
+| USB VCC |  | 9 | 5V |
+| USB VCC  |  | 10 | 5V |
+| PA9 | 30 | current source  | LED |
+===== Altera USB-Blaster =====
 The [[https://www.buyaltera.com/PartDetail?partId=1212940|USB-Blaster]] is from Altera.
@@ Line 133: / Line 177: @@
 </code>
-===== tricks =====
+Now you can also use it, here with an STM32F1 micro-controller:
+<code bash>
+openocd --file interface/altera-usb-blaster.cfg --file target/stm32f1x.cfg
+Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26)
+Licensed under GNU GPL v2
+For bug reports, read
+	http://openocd.org/doc/doxygen/bugs.html
+Warn : Adapter driver 'usb_blaster' did not declare which transports it allows; assuming legacy JTAG-only
+Info : only one transport option; autoselect 'jtag'
+adapter speed: 1000 kHz
+adapter_nsrst_delay: 100
+jtag_ntrst_delay: 100
+none separate
+cortex_m reset_config sysresetreq
+Info : No lowlevel driver configured, will try them all
+Info : usb blaster interface using libftdi
+Error: unable to get latency timer
+Info : This adapter doesn't support configurable speed
+Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
+Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
+Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
+</code>
+===== SEGGER J-Link =====
+The [[http://www.aliexpress.com/item/FREE-SHIPPING-V8-ARM-Emulator-supports-ARM7-ARM9-ARM11-Cortex-M3-core-ADS-IAR-STM32-Emulator/32262570128.html|O-Link-ARM V8]] is a [[https://www.segger.com/jlink_base.html|SEGGER J-Link]] clone.
+{{:jtag:imag0403.jpg?0x150|device front}}
+{{:jtag:imag0404.jpg?0x150|device back}}
+{{:jtag:imag0406.jpg?0x150|PCB front}}
+It supports JTAG, SWD, SWO, RTCK, and voltage reference.
+That makes it the most complete JTAG adapter I have.
+====== tricks ======
-==== scan chain ====
+===== scan chain =====
 JTAG devices are called Test Access Points (TAP).
@@ Line 144: / Line 223: @@
 Thus it sometimes is useful to just list the TAPs available on a chain to know which devices are present.
-This is easily done with urJTAG:
+This is easily done with urJTAG (here with the USB Blaster):
 <code bash>
 jtag
@@ Line 172: / Line 251: @@
 OpenOCD also scans the chain if no target is provided (the adapter still need to be defined):
 <code bash>
-openocd --file interface/altera-usb-blaster.cfg --file target/stm32f1x.cfgOpen On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-11:18)
+openocd --file interface/altera-usb-blaster.cfg
+Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26)
 Licensed under GNU GPL v2
 For bug reports, read
@@ Line 178: / Line 259: @@
 Warn : Adapter driver 'usb_blaster' did not declare which transports it allows; assuming legacy JTAG-only
 Info : only one transport option; autoselect 'jtag'
-adapter speed: 1000 kHz
-adapter_nsrst_delay: 100
-jtag_ntrst_delay: 100
-none separate
-cortex_m reset_config sysresetreq
 Info : No lowlevel driver configured, will try them all
 Info : usb blaster interface using libftdi
 Error: unable to get latency timer
 Info : This adapter doesn't support configurable speed
-Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
+Warn : There are no enabled taps.  AUTO PROBING MIGHT NOT WORK!!
-Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
+Info : JTAG tap: auto0.tap tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
-Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
+Info : JTAG tap: auto1.tap tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
+Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 4 -expected-id 0x3ba00477"
+Warn : AUTO auto1.tap - use "jtag newtap auto1 tap -irlen 5 -expected-id 0x16410041"
+Warn : gdb services need one or more targets defined
+</code>
+''0x3ba00477'' corresponds to the Cortex-M3 TAP, and ''0x16410041'' to the boundary scan TAP, as documented in the [[http://www.st.com/web/en/resource/technical/document/reference_manual/CD00171190.pdf|STM32F1xx reference manual]].
+While the ST-Link v2 is mainly meant to be used as SWD adapter, it also supports JTAG. Both are implemented with the High Level Adapter (HLA) driver. But it seems scan chain is [[http://sourceforge.net/p/openocd/mailman/message/31038247/|not supported by the HLA]].
+<code bash>
+openocd --file interface/stlink-v2.cfg -c "transport select hla_jtag" -c "adapter_khz 100"
+Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26)
+Licensed under GNU GPL v2
+For bug reports, read
+	http://openocd.org/doc/doxygen/bugs.html
+hla_jtag
+adapter speed: 100 kHz
+Info : clock speed 100 kHz
+Error: BUG: current_target out of bounds
 </code>