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jtag [2019/09/05 19:14]
kingkevin [mini ST-LINK V2]
jtag [2020/06/21 08:27] (current)
kingkevin [SEGGER J-Link] mention clone
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 === MINI ST-Link V2E === === MINI ST-Link V2E ===
  
-{{:jtag:stlink_cks_case.jpg?0x100|}} +{{:jtag:mini_st-link_v2e-case.jpg?0x100|}} 
-{{:jtag:stlink_cks_front.jpg?0x100|}} +{{:jtag:mini_st-link_v2e-front.jpg?0x100|}} 
-{{:jtag:stlink_cks_back.jpg?0x100|}}+{{:jtag:mini_st-link_v2e-back.jpg?0x100|}}
  
-Instead on an STM32F103, this dongle uses a [[http://www.cksic.com/en/|CKS]] {{ :jtag:ic_mcu_cks_cks32f103xb.pdf|CS32F103}} (sometimes CKS32F103)  ({{ :jtag:ic_mcu_cks_cks32f103xb_en.pdf|datasheet translated to english}}).+Instead on an STM32F103, this dongle uses a [[http://www.cksic.com/en/|CKS]] [[http://www.cksmcu.com/cn/promcu-14.html|CKS32F103]] (sometimes CS32F103)  ({{ :jtag:ic_mcu_cks_cks32f103xb.pdf|chinese datasheet}}{{ :jtag:ic_mcu_cks_cks32f103xb_en.pdf|datasheet translated to english}}).
 I've seen pin compatible alternatives (ST STM8S003 vs Nuvoton N76E003), even architecture compatible (ST STM32F103 vs GigeDevice GD32F103), but they always had some differences (architecture, electrical pin properties, registers, ...). I've seen pin compatible alternatives (ST STM8S003 vs Nuvoton N76E003), even architecture compatible (ST STM32F103 vs GigeDevice GD32F103), but they always had some differences (architecture, electrical pin properties, registers, ...).
 The CS32F103 seems like a complete clone of the STM32F103 (exact same pinout, architecture, registers). The CS32F103 seems like a complete clone of the STM32F103 (exact same pinout, architecture, registers).
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 To check if this is a complete clone you could decapsulate the chip and compare the silicon die, or check the errata behaviour (I can't imagine they re-implemented it themselves, up to the mistakes). To check if this is a complete clone you could decapsulate the chip and compare the silicon die, or check the errata behaviour (I can't imagine they re-implemented it themselves, up to the mistakes).
 The next step would be to have a CS32F103 chip in a package marked as STM32F103. The next step would be to have a CS32F103 chip in a package marked as STM32F103.
 +
 +== GC ==
 +
 +{{:jtag:stlink_gc_case.jpg?0x100|}}
 +{{:jtag:stlink_gc_top.jpg?0x100|}}
 +{{:jtag:stlink_gc_bottom.jpg?0x100|}}
 +
 +Most ST-LINK minis which I get now use the CKS32 chip.
 +I'm a bit sad because the CS32F103C8 really only has the advertised 64 KB of flash, while the STM32F103C8 actually has 128 KB (e.g. what the STM32F103CB has), and when you have a lot of debugging strings in your firmware, you very soon reach the limit of the 64 KB.
 +Thus, on my quest to find ST-LINK minis with STM32F103 (e.g. where the ground pin is not between SWDIO and SWCLK) I landed on this one.
 +Sadly it also does not use a STM32F103, but a STM32GC102C8.
 +I have no idea what this chip is.
 +The GC series does not exist (at least ST doesn't mention it anywhere), and it predates the new G series.
 +I'm not sure if this was to save cost, because this is the first board I see with 2 ESD protections (one for USB, the other for SWDIO/SWCLK in addition to the inline protection resistors, and none for RST/SWIM).
 +
 ==== Baite ==== ==== Baite ====
  
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 But v8 and v9 are not supported anymore by J-Link, meaning no new feature will be added to them. But v8 and v9 are not supported anymore by J-Link, meaning no new feature will be added to them.
 Instead I recommend to get the [[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu/|J-Link EDU]] which is a supported v10 and not expensive. Instead I recommend to get the [[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu/|J-Link EDU]] which is a supported v10 and not expensive.
 +
 +Here pictures from devices not from official distributors, thus they might not be genuine but only clones.
  
 They come in the same case: They come in the same case:
jtag.1567703658.txt.gz · Last modified: 2019/09/05 19:14 by kingkevin