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--- jtag [2020/06/21 06:27] – [SEGGER J-Link] mention clone kingkevin
+++ jtag [2021/01/18 16:56] – [SEGGER J-Link] add OB kingkevin
@@ Line 438: / Line 438: @@
 Here a J-Link v10.
-This is currently the only version being developed on.
 It uses a NXP LPC4337 which supports USB high speed, and allows faster debugging speeds.
 In addition to the others, it adds cJTAG support:
@@ Line 444: / Line 443: @@
 {{:jtag:jlink-v10_board_top-mini.jpg?0x150|board front}}
 {{:jtag:jlink-v10_board_bottom-mini.jpg?0x150|board back}}
+Here a [[https://www.segger.com/products/debug-probes/j-link/models/j-link-ob/|J-Link OB]].
+It is supposed to be embedded on development board and provide an easy way to flash the main micro-controller.
+It have much less capabilities (no JTAG, only SWD, ...) and less protections, but is a lot smaller and sufficient for most tasks.
+Additionally it provides a UART interface, ideal for printf debugging.
+I actually can be implemented on several micro-controller, and in my case a STM32F072.
+{{:jtag:jlink-ob_front.jpg?0x150|board front}}
+{{:jtag:jlink-ob_back.jpg?0x150|board back}}
 ===== Texas Instruments XDS100v3 =====