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jtag [2020/01/22 10:49] – [mini ST-LINK V2] update board pictures kingkevinjtag [2020/06/12 16:45] – [mini ST-LINK V2] kingkevin
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 To check if this is a complete clone you could decapsulate the chip and compare the silicon die, or check the errata behaviour (I can't imagine they re-implemented it themselves, up to the mistakes). To check if this is a complete clone you could decapsulate the chip and compare the silicon die, or check the errata behaviour (I can't imagine they re-implemented it themselves, up to the mistakes).
 The next step would be to have a CS32F103 chip in a package marked as STM32F103. The next step would be to have a CS32F103 chip in a package marked as STM32F103.
 +
 +== GC ==
 +
 +{{:jtag:stlink_gc_case.jpg?0x100|}}
 +{{:jtag:stlink_gc_top.jpg?0x100|}}
 +{{:jtag:stlink_gc_bottom.jpg?0x100|}}
 +
 +Most ST-LINK minis which I get now use the CKS32 chip.
 +I'm a bit sad because the CS32F103C8 really only has the advertised 64 KB of flash, while the STM32F103C8 actually has 128 KB (e.g. what the STM32F103CB has), and when you have a lot of debugging strings in your firmware, you very soon reach the limit of the 64 KB.
 +Thus, on my quest to find ST-LINK minis with STM32F103 (e.g. where the ground pin is not between SWDIO and SWCLK) I landed on this one.
 +Sadly it also does not use a STM32F103, but a STM32GC102C8.
 +I have no idea what this chip is.
 +The GC series does not exist (at least ST doesn't mention it anywhere), and it predates the new G series.
 +I'm not sure if this was to save cost, because this is the first board I see with 2 ESD protections (one for USB, the other for SWDIO/SWCLK in addition to the inline protection resistors, and none for RST/SWIM).
 +
 ==== Baite ==== ==== Baite ====
  
jtag.txt · Last modified: 2024/01/07 17:49 by 127.0.0.1