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jtag [2017/09/06 14:57] – [Baite] kingkevinjtag [2019/02/11 18:24] – [SEGGER J-Link] kingkevin
Line 61: Line 61:
 {{:jtag:mb936_case-front.jpg?0x150|case front}} {{:jtag:mb936_case-front.jpg?0x150|case front}}
 {{:jtag:mb936_case-back.jpg?0x150|case back}} {{:jtag:mb936_case-back.jpg?0x150|case back}}
-{{:jtag:mb936_internal-front.jpg?0x150|internal front}} 
 {{:jtag:mb936_internal-front2.jpg?0x150|internal front}} {{:jtag:mb936_internal-front2.jpg?0x150|internal front}}
 {{:jtag:mb936_internal-back.jpg?0x150|internal back}} {{:jtag:mb936_internal-back.jpg?0x150|internal back}}
Line 121: Line 120:
  
 This one has an "M" logo instead of the ST logo, probably corresponding to the "MX-LINK V2" marking on the board. This one has an "M" logo instead of the ST logo, probably corresponding to the "MX-LINK V2" marking on the board.
 +
 ==== Baite ==== ==== Baite ====
  
Line 174: Line 174:
 git submodule init git submodule init
 git submodule update git submodule update
-git checkout baite-platform 
-# if you are usgin GCC >= 7 
-git cherry-pick 2ebcffa2a4911090b43c36594dae6b58d4bb2f27 
 make make
 cd src cd src
Line 210: Line 207:
 stm32flash -o /dev/ttyUSB0 stm32flash -o /dev/ttyUSB0
 # flash the DFU bootloader # flash the DFU bootloader
-stm32flash -w src/blackmagic_dfu.bin -v /dev/ttyUSB0+stm32flash -w blackmagic_dfu.bin -v /dev/ttyUSB0
 # flash the main firmware # flash the main firmware
-stm32flash -w src/blackmagic.bin -v -S 0x08002000 /dev/ttyUSB0+stm32flash -w blackmagic.bin -v -S 0x08002000 /dev/ttyUSB0
 </code> </code>
- 
-Since this adapter is based on an STM32F103C8 micro-controller with 64 kB of flash the DFU bootloader only advertises 56 kB of flash available for the main application. 
-Because the blackmagic firmware exceeds this size it will not be possible to flash it through if the DFU software doesn't ignore this restriction. 
-STM32F103C8 micro-controllers often have 128 kB of flash though, thus it is still possible to flash the blackmagic firmware using the serial bootloader (at address 0x08002000). 
-Verification during flashing ensured the whole firmware has been written successfully. 
  
 Unplug and re-plug the Baite dongle. Unplug and re-plug the Baite dongle.
 The adapter should be running the main application and two USB CDC ACM ports will appear. The adapter should be running the main application and two USB CDC ACM ports will appear.
  
-You can re-flash the device from the main application using dfu-util (if you can bring dfu-util to ignore the size restriction):+You can re-flash the device from the main application using the DFU bootloader with:
 <code bash> <code bash>
-dfu-util -d 1d50:6018 -s 0x08002000:leave -D blackmagic.bin+python2 ../scripts/stm32_mem.py blackmagic.bin
 </code> </code>
 +
 +Note: Since this adapter is based on an STM32F103C8 micro-controller with 64 kB of flash the DFU bootloader only advertises 56 kB of flash available for the main application.
 +Because the blackmagic firmware exceeds this size it will not be possible to flash it through if the DFU software doesn't ignore this restriction (i.e. ''dfu-util'').
 +STM32F103C8 micro-controllers often have 128 kB of flash though, thus it is still possible to flash the blackmagic firmware using the serial bootloader (at address 0x08002000, with verification enbaled ot ensured the whole firmware has been written successfully) or ''stm32_mem''.
  
 Here is the new "BMP Baite" {{ :jtag:bmp_baite.pdf |pinout}}: Here is the new "BMP Baite" {{ :jtag:bmp_baite.pdf |pinout}}:
Line 243: Line 239:
 </code> </code>
 ===== Altera USB-Blaster ===== ===== Altera USB-Blaster =====
 +
 +{{ :jtag:dsc02418.jpg?0x150|device front}}
  
 The [[https://www.buyaltera.com/PartDetail?partId=1212940|USB-Blaster]] is from Altera. The [[https://www.buyaltera.com/PartDetail?partId=1212940|USB-Blaster]] is from Altera.
 It is often used to flash FPGA, but is a general purpose JTAG adapter. It is often used to flash FPGA, but is a general purpose JTAG adapter.
- 
-I have a cheap [[http://www.aliexpress.com/item/Free-shipping-New-Mini-Usb-Blaster-Cable-For-CPLD-FPGA-NIOS-JTAG-Altera-Programmer-in-stock/806527241.html|Rev.c clone]]. 
-The original uses FTDI FT245 and MAX CPLD chips. 
-This one uses a Silicon Labs C8051F321 micro-controller and a 74LVC125 quad buffer, but there are many other clone variants. 
- 
-{{:jtag:dsc02418.jpg?0x100|device front}} 
-{{:jtag:dsc02419.jpg?0x100|device back}} 
-{{:jtag:dsc02420.jpg?0x100|PCB front}} 
-{{:jtag:dsc02424.jpg?0x100|PCB back}} 
  
 :!: be aware that here the VCC{TARGET} pin has to be connected to a reference voltage used for the JTAG communication, generally provided by the target device on the board (often 3.3V or 1.8V). :!: be aware that here the VCC{TARGET} pin has to be connected to a reference voltage used for the JTAG communication, generally provided by the target device on the board (often 3.3V or 1.8V).
Line 267: Line 256:
 </code> </code>
  
-To be able to use it I had to recompile OpenOCD for the USB-Blaster to use libftdi (probable because it's a clone).+To be able to use it I had to recompile OpenOCD for the USB-Blaster to use libftdi (maybe because it's a clone).
 <code bash> <code bash>
 git clone http://git.code.sf.net/p/openocd/code openocd-code git clone http://git.code.sf.net/p/openocd/code openocd-code
Line 331: Line 320:
 Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
 </code> </code>
 +
 +The original uses FTDI FT245 and MAX CPLD chips.
 +There are numerous clone variants, with various quality and voltage support.
 +
 +==== SiLabs USB-Blaster ====
 +
 +This one uses a Silicon Labs C8051F321 micro-controller and a 74LVC125 quad buffer (for signal voltages from 1.65 to 3.6 V).
 +
 +{{:jtag:mini_silabs_front.jpg?0x150|SiLabs USB-Blaster front}}
 +{{:jtag:mini_silabs_back.jpg?0x150|SiLabs USB-Blaster back}}
 +
 +==== PIC USB-Blaster ====
 +
 +This one uses a Microchip PIC18F14 micro-controller and has no buffer (thus only supporting 5 V signals).
 +
 +{{:jtag:mini_pic_front.jpg?0x150|PIC USB-Blaster front}}
 +{{:jtag:mini_pic_back.jpg?0x150|PIC USB-Blaster back}}
 +
 +==== ARMJISHU USB-Blaster ====
 +
 +This one uses a ST STM32F101 (as a STM32F103 with USB support) micro-controller and a 74HC244 octal-buffer (for signal voltages from 2.0 to 6.0 V).
 +
 +{{:jtag:mini_stm32_front.jpg?0x150|ARMJISHU USB-Blaster front}}
 +{{:jtag:mini_stm32_back.jpg?0x150|ARMJISHU USB-Blaster back}}
 +
 +I also reversed the {{:jtag:bus_blaster-stm32.pdf|schematic}}.
 +It shows that the hardware can also drive the signals (at 3.3 V) in case Vcc_target is not connected, and you can add an uSD card slot or SPI flash.
 +I don't know if these features are supported in software.
 +
 +{{:jtag:mini_stm32_front-board.jpg?0x150|ARMJISHU board USB-Blaster front}}
 +{{:jtag:mini_stm32_back-board.jpg?0x150|ARMJISHU board USB-Blaster back}}
  
 ===== SEGGER J-Link ===== ===== SEGGER J-Link =====
  
-The [[http://www.aliexpress.com/item/FREE-SHIPPING-V8-ARM-Emulator-supports-ARM7-ARM9-ARM11-Cortex-M3-core-ADS-IAR-STM32-Emulator/32262570128.html|O-Link-ARM V8]] is a [[https://www.segger.com/jlink_base.html|SEGGER J-Link]] clone.+The [[https://www.segger.com/jlink_base.html|SEGGER J-Link]] supports JTAG, SWD, SWO, RTCK, and voltage reference (or provide 3.3V). 
 +That makes it one of the most complete JTAG adapter. 
 + 
 +There are plenty of different J-Link clones available, from light version with the minimum number of components, to full version with all features. 
 + 
 +The come in the same case:
  
 {{:jtag:imag0403.jpg?0x150|device front}} {{:jtag:imag0403.jpg?0x150|device front}}
 {{:jtag:imag0404.jpg?0x150|device back}} {{:jtag:imag0404.jpg?0x150|device back}}
-{{:jtag:imag0406.jpg?0x150|PCB front}} 
  
-It supports JTAG, SWD, SWO, RTCK, and voltage reference+Here a J-Link v8 with large passives: 
-That makes it the most complete JTAG adapter I have.+ 
 +{{:jtag:jlink-v8-large-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v8-large-back.jpg?0x150|board back}} 
 + 
 +Here a J-Link v8 with smaller and a bit less passives: 
 + 
 +{{:jtag:jlink-v8-thin-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v8-thin-back.jpg?0x150|board back}} 
 + 
 +Here a light J-Link v9 (v9 uses a fast High-Speed STM32F205 instead of the v8 Full-Speed AT91SAM7S): 
 + 
 +{{:jtag:jlink-v9-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v9-back.jpg?0x150|board back}} 
 +===== Texas Instruments XDS100v3 ===== 
 + 
 +The [[http://processors.wiki.ti.com/index.php/XDS100|XDS100v3]] supports cJTAG (aka. IEEE 1149.7or SWD alternative)but I did not have the opportunity to test it yet
 + 
 +{{:jtag:xds100v3_case.jpg?0x150|device}} 
 +{{:jtag:xds100v3_front.jpg?0x150|board front}} 
 +{{:jtag:xds100v3_back.jpg?0x150|board back}} 
 + 
 +===== DISTORTEC JTAG-lock-pick Tiny 2 ===== 
 + 
 +The [[http://www.distortec.com/jtag-lock-pick-tiny-2/|JTAG-lock-pick Tiny 2]] is just a very fast (using a FT232H chip), and compact (although it could be even more compact if the component were on both sides) JTAG adapter supporting 1.4V to 5.5V signals (using a CPLD), RTCK, SRST, and TRST.
  
 +{{:jtag:jtag-lockpick_front.jpg?0x150|board front}}
 +{{:jtag:jtag-lockpick_back.jpg?0x150|board back}}
 ====== tricks ====== ====== tricks ======
  
jtag.txt · Last modified: 2024/01/07 17:49 by 127.0.0.1