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jtag [2016/01/12 15:26] – created kingkevinjtag [2019/02/20 11:50] – [SEGGER J-Link] kingkevin
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-Here I will describe my experiences with JTAG and how I use it. +JTAG is a technology to test integrated circuits, mostly micro-controllers and CPUs. 
- +It allows to do hardware debugging: read/write memory, control I/Os, and debug running code.\\ 
-JTAG is a technology to test electronics. +SWD is a more modern version of JTAG and only requires 2 pins instead of 4[+1].\\ 
-It allows to do hardware debugging: test I/O, flash firmwares, step through assembly code, ...+SWJ is a combination of Serial Wire Debug (SWD) and JTAG. 
 +But they provide the same logical functions.
  
 On one side this functionality must be included in the target device. On one side this functionality must be included in the target device.
-Most 32 bits micro-controllers and SoCs have it.\\ +The Debug Port is often called JTAG-DP for JTAG and SW-DP for SWD. 
-On the other side you need a JTAG adapter so the host can speak to the device using the JTAG protocol. +SWJ capable device include and often combine both, as the SWD signal pins SWDIO and SWCLK re-use the JTAG signal pin JTMS and JTCK (backwards compatible). 
-JTAG adapters can go from cheap (<5$) to expensive (>1000$), depending on the quality of the hardware and software.+Most 32 bits micro-controllers and SoCs have one of both (or both).
  
-===== JTAG adapters =====+On the other side you need a SWJ adapter so the host can speak to the device using the JTAG and/or SWD protocol. 
 +SWJ adapters can go from cheap (<5$) to expensive (>1000$), depending on the quality of the hardware and software.
  
-These are the main JTAG adapters I am using.+====== SWJ adapters ======
  
-==== ST-Link v2 (clone) ====+These are the main SWJ adapters I am using. 
 + 
 +===== ST-Link v2 =====
  
 The [[http://www.st.com/web/catalog/tools/FM146/CL1984/SC724/SS1677/PF251168|ST-LINK/V2]] is from STMicroelectronics, and is very convenient to flash their STM8 and STM32 micro-controllers, such as the [[stm32f1xx|STM32 F1 series]]. The [[http://www.st.com/web/catalog/tools/FM146/CL1984/SC724/SS1677/PF251168|ST-LINK/V2]] is from STMicroelectronics, and is very convenient to flash their STM8 and STM32 micro-controllers, such as the [[stm32f1xx|STM32 F1 series]].
 +It supports JTAG, SWD, and SWIM (for STM8).
  
-I have two cheap clones: +These SWJ adapters are based STM32F1xx ARM Cortex M3 micro-controllers.
-  * one from [[http://www.aliexpress.com/item/Free-Shipping-1SET-ST-Link-st-link-V2-for-STM8S-STM8L-STM32-Cortex-M0-Cortex-M3/1758613434.html|BAITE]] +
-{{:jtag:dsc02404.jpg?0x100|device front}} +
-{{:jtag:dsc02405.jpg?0x100|device back}} +
-{{:jtag:dsc02403.jpg?0x100|PCB front}} +
-{{:jtag:dsc02406.jpg?0x100|pinout sticker}} +
-{{:jtag:st-link_v2_baite.svg?0x100|pinout}} +
-  * one [[http://www.aliexpress.com/item/Hot-Sale-1PCS-ST-LINK-Stlink-ST-Link-V2-Mini-STM8-STM32-Simulator-Download-Programmer-Programming/32343514985.html|more generic]] +
-{{:jtag:dsc02407.jpg?0x100|device front}} +
-{{:jtag:dsc02408.jpg?0x100|device back}} +
-{{:jtag:dsc02415.jpg?0x100|PCB front}} +
-{{:jtag:dsc02410.jpg?0x100|PCB back}} +
- +
-These devices use the Serial Wire Debug (SWD) protocol. +
-This is newer variant of JTAG which requires only 2 signal lines instead of 4+. +
-But but aware, they both have different pinouts on the connector. +
- +
-These JTAG adapter are based STM32F1xx ARM Cortex M3 micro-controllers.+
 And ironically enough I in turn use them to program and debug STM32F1xx ARM Cortex M3 micro-controllers. And ironically enough I in turn use them to program and debug STM32F1xx ARM Cortex M3 micro-controllers.
  
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 This has only to be done once, before the device is plugged in to be used: This has only to be done once, before the device is plugged in to be used:
 <code bash> <code bash>
-echo -n 'STM32F1xx ARM Cortex M3 micro-controllers' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules+echo -n 'ST-Link V2 SWJ adapter' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules
 echo -n 'ATTR{idVendor}=="0483", ATTR{idProduct}=="3748", MODE="0666"' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules echo -n 'ATTR{idVendor}=="0483", ATTR{idProduct}=="3748", MODE="0666"' | sudo tee -a /etc/udev/rules.d/60-st-linkv2.rules
 sudo udevadm control --reload-rules sudo udevadm control --reload-rules
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 </code> </code>
  
-==== Altera USB-Blaster (clone) ====+I am using cheap clones.
  
-The [[https://www.buyaltera.com/PartDetail?partId=1212940|USB-Blaster]] is from Altera. +==== ST-LINK/V2 clone ====
-It is often used to flash FPGA, but is a general purpose JTAG adapter.+
  
-I have a cheap [[http://www.aliexpress.com/item/Free-shipping-New-Mini-Usb-Blaster-Cable-For-CPLD-FPGA-NIOS-JTAG-Altera-Programmer-in-stock/806527241.html|Rev.c clone]]. +{{:jtag:mb936_case-front.jpg?0x150|case front}} 
-The original uses FTDI FT245 and MAX CPLD chips. +{{:jtag:mb936_case-back.jpg?0x150|case back}} 
-This one uses a Silicon Labs C8051F321 micro-controller and a 74LVC125 quad buffer, but there are many other clone variants.+{{:jtag:mb936_internal-front2.jpg?0x150|internal front}} 
 +{{:jtag:mb936_internal-back.jpg?0x150|internal back}}
  
-{{:jtag:dsc02418.jpg?0x100|device front}} +This is a complete rip-off of the [[http://www.st.com/web/catalog/tools/FM146/CL1984/SC724/SS1677/PF251168|ST-LINK/V2]]. 
-{{:jtag:dsc02419.jpg?0x100|device back}} +It comes in the same box, with the same cables, the enclosure is the same, even the board name has been taken over (MB936), but the board isn't the same. 
-{{:jtag:dsc02420.jpg?0x100|PCB front}} +The BOM doesn't match with the [[http://www.st.com/resource/en/bill_of_materials/st-link_v2_bom.zip|original]].\\ 
-{{:jtag:dsc02424.jpg?0x100|PCB back}}+The original adapter comes with ESD protection, protection resistors, and a transceiver to allow operating with target signal levels of 1.65V to 5.5V. 
 +This is completely missing on the clone since the connector pins are directly connected to the micro-controller. 
 +Thus it only supports target signal levels of 3.3V and sometimes 5V since the pins are 5V tolerant. 
 + 
 +For $9 you can't expect more, and if you want a cheap adapter I recommend the other ones (see below). 
 + 
 +==== ST-LINK V2 aluminium ==== 
 + 
 +These adapters come in a small dongle sized aluminium case. 
 +They supports SWD, and SWIM (for STM8), but not JTAG. 
 + 
 +At $2.5 they are the cheapest clones you can find.\\ 
 +One trick to get this ridiculously low price is to use STM32F101 micro-controllers. 
 +Compared to the STM32F103 micro-controllers they offer less functionalities, like USB ... yet this is a USB dongle! 
 +Well this is because these micro-controllers use the same die, but if not all STM32F103 feature tests pass after production they get packages as STM32F101, but it seems that USB still works well enough. 
 +At least this is my guess. 
 +It would be interesting to check if the other STM32F103 peripherals normally not present on the STM32F101 work as well, but I wouldn't rely on these. 
 +After all, they are probably marked as STM32F101 for a good reason.\\ 
 +Similarly the STM32F103C8 is only rated having 64 kB of flash because it didn't pass the flash test, compared to the 128 kB for the STM32F103CB, but they very often have more (you can verify by read/writing and check for errors). 
 + 
 +Several board versions exist and it is hard to know what you will get. 
 +Always check the pinout on the aluminium case since this also varies. 
 + 
 +=== 2014-06-22 ST-LINK V2 === 
 + 
 +{{:jtag:alu_dongle_front.jpg?0x100|}} 
 +{{:jtag:alu_board_front.jpg?0x100|}} 
 +{{:jtag:alu_board_back.jpg?0x100|}} 
 + 
 +I've also reversed the {{:jtag:alu.pdf|schematic}} for this board. 
 + 
 +One other nice trick they used is to have twos LEDs on the same pin (PA9): 
 +  * when the pin is set to output high, only one LED lights up 
 +  * when the pin is set to output low, the other LED light up 
 +  * when set to input floating, both LEDs are off 
 +  * when PWM output is used, you can mix the two colors (red and blue) quite well due to the persistence of vision (also because the LEDs are next to each other and the small hole in the case is in the center). 
 + 
 +=== swapped === 
 + 
 +{{:jtag:reverse-gnd_case-front.jpg?0x100|}} 
 +{{:jtag:reverse-gnd_internal-front.jpg?0x100|}} 
 +{{:jtag:reverse-gnd_internal-back.jpg?0x100|}} 
 + 
 +From the outside this looks very similar to the previous one, except that the connector pinout is very different (except for power) and there is only one LED.\\ 
 +No markings are on the board. 
 + 
 +=== 2016-01-18 MX-LINK V2 === 
 + 
 +{{:jtag:mx-link__case-front.jpg?0x100|}} 
 +{{:jtag:mx-link__internal-front.jpg?0x100|}} 
 +{{:jtag:mx-link__internal-back.jpg?0x100|}} 
 + 
 +This one has an "M" logo instead of the ST logo, probably corresponding to the "MX-LINK V2" marking on the board. 
 + 
 +==== Baite ==== 
 + 
 +{{:jtag:baite_dongle_front.jpg?0x100|dongle front}} 
 +{{:jtag:baite_dongle_back.jpg?0x100|dongle back}} 
 +{{:jtag:baite_board_front.jpg?0x100|board front}} 
 +{{:jtag:baite_board_back.jpg?0x100|board front}} 
 + 
 +The [[http://betemcu.cn/|Baite]] [[https://www.aliexpress.com/store/product/Best-Quality-ST-Link-stlink-V2-for-STM8S-STM8L-STM32-Cortex-M0-Cortex-M3-SWIM-JTAG/213957_32676015777.html|ST-Link V2]] is my favorite clone since it supports JTAG, SWD, and SWIM (for STM8). 
 + 
 +They seem to use the same board also for several other programmers, and since the pinout is not on the case I've decided to make my own sticker. 
 + 
 +{{:jtag:dsc02406.jpg?0x100|pinout sticker}} 
 +{{:jtag:st-link_v2_baite.svg?0x100|pinout}} 
 + 
 +I've also reversed the board layout to get the {{:jtag:baite.pdf|schematic}}. 
 +The connector pins are all protected with 220 ohms resistors. 
 + 
 +{{:jtag:baite-v2a-board_front.jpg?0x100|board front}} 
 +{{:jtag:baite-v2a-board_back.jpg?0x100|board front}} 
 + 
 +There is a newer version marked as "V2A" (under the crystal), but the {{:jtag:baite-v2a.pdf|schematic}} is pretty much the same with the following changes: 
 +  * all pads for the micro-controller are present (there is even solder mask between them) 
 +  * they added a SWD port 
 +  * the STM32F103C8 has been replaced with a STM32F101CB, but they are treating it as a STM32F103 (like the other cheap dongles) 
 +  * the passives are smaller 
 +  * the routing is horrible 
 + 
 +===== Black Magic Probe ===== 
 + 
 +The [[https://github.com/blacksphere/blackmagic/wiki|Black Magic Probe]] (aka. BMP) is a quite nice SWJ adapter because it comes with an embedded GDB server. 
 +Thus no need to have an OpenOCD server to control the SWJ adapter. 
 +You can directly connect GDB to this adapter (over USB CDC ACM).\\ 
 +It also comes with a UART port (over a second USB CDC ACM). 
 +This is very useful while developing (for printf debugging). 
 + 
 +The hardware comes with some disadvantages though: 
 +  * the ARM Cortex SWJ connector uses a small header (not very dupont-wire friendly) 
 +  * the separate UART is not always populated (UART is also available on the SWJ connector) 
 +  * it is expensive (> $50), but this price is quite reasonable since it supports the project 
 +  * it was sold out for quite some time, encouraging me to look for an alternative 
 + 
 +Because the firmware is open source it is possible to port it to other hardware, and [[https://github.com/blacksphere/blackmagic/wiki/Debugger-Hardware|people already did it]].\\ 
 +It has been [[https://medium.com/@paramaggarwal/converting-an-stm32f103-board-to-a-black-magic-probe-c013cf2cc38c|ported]] on the [[stm32f1xx#blue_pill|blue pill]], but I don't find this board as handy as a dongle.\\ 
 +It has also been [[http://blog.linuxbits.io/2016/02/15/cheap-chinese-st-link-v-2-programmer-converted-to-black-magic-probe-debugger/|ported]] to the [[#st-link_v2_aluminium|ST-Link V2 clone]], but then there is no additional UART anymore.\\ 
 +So I decided to port it to the [[#baite|baite]]. 
 +This has less power pins (who needs 2xGND, 2x5V, 3x3.3V anyway), but provides enough function pins to add UART (and SRST). 
 + 
 +To build the firmware ([[https://github.com/blacksphere/blackmagic/pull/274|patch]] integration pending): 
 +<code bash> 
 +git clone https://github.com/tsaitgaist/blackmagic.git 
 +cd blackmagic 
 +git submodule init 
 +git submodule update 
 +make 
 +cd src 
 +make clean 
 +make PROBE_HOST=baite 
 +</code> 
 + 
 +Now we need to re-flash the Baite dongle.\\ 
 +As you can see on the {{:jtag:baite.pdf|schematic}} the JTAG and SWD pins of the micro-controller are not connected (there even are no pads on the board for the pins to be soldered on). 
 +But on the back of the board you can find test points so to program the device using the serial bootloader: 
 + 
 +^ pin ^ signal ^ 
 +| 1 (square) | RX | 
 +| 2 | TX | 
 +| 3 | BOOT0 | 
 +| 4 | +5V | 
 +| 5 | GND | 
 + 
 +Use any USB to UART converter and connect the corresponding pins to this port. 
 +Don't power the Baite dongle over USB since it might then boot the normal application. 
 +Instead let the USB to UART converter power it. 
 +To start the serial bootloader when powering the dongle you need to set BOOT0 high by connecting it to +3.3V or DTR (or any high signal present on the USB to UART converter). 
 + 
 +To flash the Black Magic firmware I used [[https://sourceforge.net/p/stm32flash/wiki/Home/|stm32flash]]. 
 +Since the flash is read/write protected you first need to clear these option bits. 
 + 
 +<code bash> 
 +# disable flash read protection 
 +stm32flash -k /dev/ttyUSB0 
 +# disable flash write protection 
 +stm32flash -u /dev/ttyUSB0 
 +# erase flash 
 +stm32flash -o /dev/ttyUSB0 
 +# flash the DFU bootloader 
 +stm32flash -w blackmagic_dfu.bin -v /dev/ttyUSB0 
 +# flash the main firmware 
 +stm32flash -w blackmagic.bin -v -S 0x08002000 /dev/ttyUSB0 
 +</code> 
 + 
 +Unplug and re-plug the Baite dongle. 
 +The adapter should be running the main application and two USB CDC ACM ports will appear. 
 + 
 +You can re-flash the device from the main application using the DFU bootloader with: 
 +<code bash> 
 +python2 ../scripts/stm32_mem.py blackmagic.bin 
 +</code> 
 + 
 +Note: Since this adapter is based on an STM32F103C8 micro-controller with 64 kB of flash the DFU bootloader only advertises 56 kB of flash available for the main application. 
 +Because the blackmagic firmware exceeds this size it will not be possible to flash it through if the DFU software doesn't ignore this restriction (i.e. ''dfu-util''). 
 +STM32F103C8 micro-controllers often have 128 kB of flash though, thus it is still possible to flash the blackmagic firmware using the serial bootloader (at address 0x08002000, with verification enbaled ot ensured the whole firmware has been written successfully) or ''stm32_mem''. 
 + 
 +Here is the new "BMP Baite" {{ :jtag:bmp_baite.pdf |pinout}}: 
 +^ signal ^ pin ^ pin ^ signal ^ 
 +| SRST | 1 | 2| +3.3V | 
 +| +5V | 3 | 4 | JTCK/SWCLK | 
 +| RX | 5 (key) | 6 | JTMS/SWDIO | 
 +| GND | 7 | 8 | JTDO/TRACESWO | 
 +| TX | 9 | 10 | JTDI | 
 + 
 +**note**: the RX pin is pulled up by a 620 ohms resistor. Thus the TX connected to BMP Baite must by strong enough to drive it low (e.g. not like with the CH340 USB to UART converter). 
 + 
 +If you connect SRST to the target NRST, it is even possible to reset the target board without having to press on the on-board reset button (of there is any): 
 +<code bash> 
 +gdb --eval-command="target extended-remote /dev/ttyACM0" --eval-command="monitor hard_srst" --eval-command="quit" 
 +</code> 
 +===== Altera USB-Blaster ===== 
 + 
 +{{ :jtag:dsc02418.jpg?0x150|device front}} 
 + 
 +The [[https://www.buyaltera.com/PartDetail?partId=1212940|USB-Blaster]] is from Altera. 
 +It is often used to flash FPGA, but is a general purpose JTAG adapter.
  
 :!: be aware that here the VCC{TARGET} pin has to be connected to a reference voltage used for the JTAG communication, generally provided by the target device on the board (often 3.3V or 1.8V). :!: be aware that here the VCC{TARGET} pin has to be connected to a reference voltage used for the JTAG communication, generally provided by the target device on the board (often 3.3V or 1.8V).
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 </code> </code>
  
-To be able to use it I had to recompile OpenOCD for the USB-Blaster to use libftdi (probable because it's a clone).+To be able to use it I had to recompile OpenOCD for the USB-Blaster to use libftdi (maybe because it's a clone).
 <code bash> <code bash>
 git clone http://git.code.sf.net/p/openocd/code openocd-code git clone http://git.code.sf.net/p/openocd/code openocd-code
Line 133: Line 297:
 </code> </code>
  
-===== tricks =====+Now you can also use it, here with an STM32F1 micro-controller: 
 +<code bash> 
 +openocd --file interface/altera-usb-blaster.cfg --file target/stm32f1x.cfg 
 + 
 +Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26) 
 +Licensed under GNU GPL v2 
 +For bug reports, read 
 + http://openocd.org/doc/doxygen/bugs.html 
 +Warn : Adapter driver 'usb_blaster' did not declare which transports it allows; assuming legacy JTAG-only 
 +Info : only one transport option; autoselect 'jtag' 
 +adapter speed: 1000 kHz 
 +adapter_nsrst_delay: 100 
 +jtag_ntrst_delay: 100 
 +none separate 
 +cortex_m reset_config sysresetreq 
 +Info : No lowlevel driver configured, will try them all 
 +Info : usb blaster interface using libftdi 
 +Error: unable to get latency timer 
 +Info : This adapter doesn't support configurable speed 
 +Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) 
 +Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) 
 +Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints 
 +</code> 
 + 
 +The original uses FTDI FT245 and MAX CPLD chips. 
 +There are numerous clone variants, with various quality and voltage support. 
 + 
 +==== SiLabs USB-Blaster ==== 
 + 
 +This one uses a Silicon Labs C8051F321 micro-controller and a 74LVC125 quad buffer (for signal voltages from 1.65 to 3.6 V). 
 + 
 +{{:jtag:mini_silabs_front.jpg?0x150|SiLabs USB-Blaster front}} 
 +{{:jtag:mini_silabs_back.jpg?0x150|SiLabs USB-Blaster back}} 
 + 
 +==== PIC USB-Blaster ==== 
 + 
 +This one uses a Microchip PIC18F14 micro-controller and has no buffer (thus only supporting 5 V signals). 
 + 
 +{{:jtag:mini_pic_front.jpg?0x150|PIC USB-Blaster front}} 
 +{{:jtag:mini_pic_back.jpg?0x150|PIC USB-Blaster back}} 
 + 
 +==== ARMJISHU USB-Blaster ==== 
 + 
 +This one uses a ST STM32F101 (as a STM32F103 with USB support) micro-controller and a 74HC244 octal-buffer (for signal voltages from 2.0 to 6.0 V). 
 + 
 +{{:jtag:mini_stm32_front.jpg?0x150|ARMJISHU USB-Blaster front}} 
 +{{:jtag:mini_stm32_back.jpg?0x150|ARMJISHU USB-Blaster back}} 
 + 
 +I also reversed the {{:jtag:bus_blaster-stm32.pdf|schematic}}. 
 +It shows that the hardware can also drive the signals (at 3.3 V) in case Vcc_target is not connected, and you can add an uSD card slot or SPI flash. 
 +I don't know if these features are supported in software. 
 + 
 +{{:jtag:mini_stm32_front-board.jpg?0x150|ARMJISHU board USB-Blaster front}} 
 +{{:jtag:mini_stm32_back-board.jpg?0x150|ARMJISHU board USB-Blaster back}} 
 + 
 +===== SEGGER J-Link ===== 
 + 
 +The [[https://www.segger.com/jlink_base.html|SEGGER J-Link]] supports JTAG, SWD, SWO, RTCK, and voltage reference (or provide 3.3V). 
 +That makes it one of the most complete JTAG adapter. 
 + 
 +There are plenty of different J-Link clones available, from light version with the minimum number of components, to full version with all features. 
 + 
 +The come in the same case: 
 + 
 +{{:jtag:imag0403.jpg?0x150|device front}} 
 +{{:jtag:imag0404.jpg?0x150|device back}} 
 + 
 +Here a J-Link v8 with large passives: 
 + 
 +{{:jtag:jlink-v8-large-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v8-large-back.jpg?0x150|board back}} 
 + 
 +Here a J-Link v8 with smaller and a bit less passives: 
 + 
 +{{:jtag:jlink-v8-thin-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v8-thin-back.jpg?0x150|board back}} 
 + 
 +Here a light J-Link v9. 
 +v9 uses a STM32F205 (providing 20 MHz JTAG/15 MHz SWD) while v8 uses a AT91SAM7S (providing 10 MHz JTAG/4 MHz SWD): 
 + 
 +{{:jtag:jlink-v9-front.jpg?0x150|board front}} 
 +{{:jtag:jlink-v9-back.jpg?0x150|board back}} 
 +===== Texas Instruments XDS100v3 ===== 
 + 
 +The [[http://processors.wiki.ti.com/index.php/XDS100|XDS100v3]] supports cJTAG (aka. IEEE 1149.7, or SWD alternative), but I did not have the opportunity to test it yet. 
 + 
 +{{:jtag:xds100v3_case.jpg?0x150|device}} 
 +{{:jtag:xds100v3_front.jpg?0x150|board front}} 
 +{{:jtag:xds100v3_back.jpg?0x150|board back}} 
 + 
 +===== DISTORTEC JTAG-lock-pick Tiny 2 ===== 
 + 
 +The [[http://www.distortec.com/jtag-lock-pick-tiny-2/|JTAG-lock-pick Tiny 2]] is just a very fast (using a FT232H chip), and compact (although it could be even more compact if the component were on both sides) JTAG adapter supporting 1.4V to 5.5V signals (using a CPLD), RTCK, SRST, and TRST. 
 + 
 +{{:jtag:jtag-lockpick_front.jpg?0x150|board front}} 
 +{{:jtag:jtag-lockpick_back.jpg?0x150|board back}} 
 +====== tricks ======
  
-==== scan chain ====+===== scan chain =====
  
 JTAG devices are called Test Access Points (TAP). JTAG devices are called Test Access Points (TAP).
Line 144: Line 404:
 Thus it sometimes is useful to just list the TAPs available on a chain to know which devices are present. Thus it sometimes is useful to just list the TAPs available on a chain to know which devices are present.
  
-This is easily done with urJTAG:+This is easily done with urJTAG (here with the USB Blaster):
 <code bash> <code bash>
 jtag  jtag 
Line 172: Line 432:
 OpenOCD also scans the chain if no target is provided (the adapter still need to be defined): OpenOCD also scans the chain if no target is provided (the adapter still need to be defined):
 <code bash> <code bash>
-openocd --file interface/altera-usb-blaster.cfg --file target/stm32f1x.cfgOpen On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-11:18)+openocd --file interface/altera-usb-blaster.cfg 
 + 
 +Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26)
 Licensed under GNU GPL v2 Licensed under GNU GPL v2
 For bug reports, read For bug reports, read
Line 178: Line 440:
 Warn : Adapter driver 'usb_blaster' did not declare which transports it allows; assuming legacy JTAG-only Warn : Adapter driver 'usb_blaster' did not declare which transports it allows; assuming legacy JTAG-only
 Info : only one transport option; autoselect 'jtag' Info : only one transport option; autoselect 'jtag'
-adapter speed: 1000 kHz 
-adapter_nsrst_delay: 100 
-jtag_ntrst_delay: 100 
-none separate 
-cortex_m reset_config sysresetreq 
 Info : No lowlevel driver configured, will try them all Info : No lowlevel driver configured, will try them all
 Info : usb blaster interface using libftdi Info : usb blaster interface using libftdi
 Error: unable to get latency timer Error: unable to get latency timer
 Info : This adapter doesn't support configurable speed Info : This adapter doesn't support configurable speed
-Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) +Warn : There are no enabled taps.  AUTO PROBING MIGHT NOT WORK!! 
-Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) +Info : JTAG tap: auto0.tap tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) 
-Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints+Info : JTAG tap: auto1.tap tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) 
 +Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 4 -expected-id 0x3ba00477" 
 +Warn : AUTO auto1.tap - use "jtag newtap auto1 tap -irlen 5 -expected-id 0x16410041" 
 +Warn : gdb services need one or more targets defined 
 +</code> 
 + 
 +''0x3ba00477'' corresponds to the Cortex-M3 TAP, and ''0x16410041'' to the boundary scan TAP, as documented in the [[http://www.st.com/web/en/resource/technical/document/reference_manual/CD00171190.pdf|STM32F1xx reference manual]]. 
 + 
 +While the ST-Link v2 is mainly meant to be used as SWD adapter, it also supports JTAG. Both are implemented with the High Level Adapter (HLA) driver. But it seems scan chain is [[http://sourceforge.net/p/openocd/mailman/message/31038247/|not supported by the HLA]]. 
 +<code bash> 
 +openocd --file interface/stlink-v2.cfg -c "transport select hla_jtag" -c "adapter_khz 100" 
 + 
 +Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26) 
 +Licensed under GNU GPL v2 
 +For bug reports, read 
 + http://openocd.org/doc/doxygen/bugs.html 
 +hla_jtag 
 +adapter speed: 100 kHz 
 +Info : clock speed 100 kHz 
 +Error: BUG: current_target out of bounds
 </code> </code>
jtag.txt · Last modified: 2024/01/07 17:49 by 127.0.0.1