jtag
Differences
This shows you the differences between two versions of the page.
Next revision | Previous revisionNext revisionBoth sides next revision | ||
jtag [2016/01/12 15:26] – created kingkevin | jtag [2017/03/30 12:50] – move aluminium kingkevin | ||
---|---|---|---|
Line 1: | Line 1: | ||
- | Here I will describe my experiences with JTAG and how I use it. | + | JTAG is a technology to test integrated circuits, mostly micro-controllers and CPUs. |
- | + | It allows to do hardware debugging: | |
- | JTAG is a technology to test electronics. | + | SWD is a more modern version of JTAG and only requires 2 pins instead of 4[+1].\\ |
- | It allows to do hardware debugging: | + | SWJ is a combination of Serial Wire Debug (SWD) and JTAG. |
+ | But they provide the same logical functions. | ||
On one side this functionality must be included in the target device. | On one side this functionality must be included in the target device. | ||
- | Most 32 bits micro-controllers | + | The Debug Port is often called JTAG-DP for JTAG and SW-DP for SWD. |
- | On the other side you need a JTAG adapter so the host can speak to the device | + | SWJ capable |
- | JTAG adapters can go from cheap (<5$) to expensive (> | + | Most 32 bits micro-controllers and SoCs have one of both (or both). |
- | ===== JTAG adapters | + | On the other side you need a SWJ adapter so the host can speak to the device using the JTAG and/or SWD protocol. |
+ | SWJ adapters | ||
- | These are the main JTAG adapters | + | ====== SWJ adapters |
- | ==== ST-Link v2 (clone) | + | These are the main SWJ adapters I am using. |
+ | |||
+ | ===== ST-Link v2 ===== | ||
The [[http:// | The [[http:// | ||
+ | It supports JTAG, SWD, and SWIM (for STM8). | ||
- | I have two cheap clones: | + | These SWJ adapters |
- | * one from [[http:// | + | |
- | {{: | + | |
- | {{: | + | |
- | {{: | + | |
- | {{: | + | |
- | {{: | + | |
- | * one [[http:// | + | |
- | {{: | + | |
- | {{: | + | |
- | {{: | + | |
- | {{: | + | |
- | + | ||
- | These devices use the Serial Wire Debug (SWD) protocol. | + | |
- | This is newer variant of JTAG which requires only 2 signal lines instead of 4+. | + | |
- | But but aware, they both have different pinouts on the connector. | + | |
- | + | ||
- | These JTAG adapter | + | |
And ironically enough I in turn use them to program and debug STM32F1xx ARM Cortex M3 micro-controllers. | And ironically enough I in turn use them to program and debug STM32F1xx ARM Cortex M3 micro-controllers. | ||
Line 40: | Line 28: | ||
This has only to be done once, before the device is plugged in to be used: | This has only to be done once, before the device is plugged in to be used: | ||
<code bash> | <code bash> | ||
- | echo -n 'STM32F1xx ARM Cortex M3 micro-controllers' | sudo tee -a / | + | echo -n 'ST-Link V2 SWJ adapter' | sudo tee -a / |
echo -n ' | echo -n ' | ||
sudo udevadm control --reload-rules | sudo udevadm control --reload-rules | ||
Line 67: | Line 55: | ||
</ | </ | ||
- | ==== Altera USB-Blaster | + | I am using cheap clones. |
+ | |||
+ | ==== ST-LINK/V2 clone ==== | ||
+ | |||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | This is a complete rip-off of the [[http:// | ||
+ | It comes in the same box, with the same cables, the enclosure is the same, even the board name has been taken over (MB936), but the board isn't the same. | ||
+ | The BOM doesn' | ||
+ | The original adapter come with ESD protection, protection resistors, and a transceiver to allow operating with target signal levels of 1.65V to 5.5V. | ||
+ | This is completely missing on the clone since the connector pins are directly connected to the micro-controller. | ||
+ | Thus it only supports target signal levels of 3.3V and sometimes 5V since the pins are 5V tolerant. | ||
+ | |||
+ | For $9 you can't expect more, and if you want a cheap adapter I recommend the other ones (see below). | ||
+ | |||
+ | ==== aluminium ==== | ||
+ | |||
+ | This [[http:// | ||
+ | It supports SWD, and SWIM (for STM8), but not JTAG. | ||
+ | They replaced the additional JTAG pins with power pins. | ||
+ | |||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | STM32F103C8 connection: | ||
+ | ^ STM32F103C8 signal ^ STM32F103C8 pin ^ adapter pin ^ adapter signal ^ | ||
+ | | PB6 | 42 | 1 | RST | | ||
+ | | PB14 | 27 | 2 | SWDIO | | ||
+ | | USB GND | | 3 | GND | | ||
+ | | USB GND | | 4 | GND | | ||
+ | | PB8/PB11 | 45/22 | 5 | SWIM | | ||
+ | | PA5/PB13 | 15/26 | 6 | SWCLK | | ||
+ | | LDO VCC | | 7 | 3.3V | | ||
+ | | LDO VCC | | 8 | 3.3V | | ||
+ | | USB VCC | | 9 | 5V | | ||
+ | | USB VCC | | 10 | 5V | | ||
+ | | PA9 | 30 | current source | ||
+ | |||
+ | ==== BAITE ==== | ||
+ | |||
+ | The first clone is a [[http:// | ||
+ | It supports JTAG, SWD, and SWIM (for STM8). | ||
+ | |||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | STM32F103C8 connection: | ||
+ | ^ STM32F103C8 signal ^ STM32F103C8 pin ^ adapter pin ^ adapter signal ^ | ||
+ | | PA7 | 17 | 1 | JRST | | ||
+ | | AMS1117 | | 2 | 3V3 | | ||
+ | | USB VCC | | 3 | 5V | | ||
+ | | PA4 | 14 | 4 | JTCK/SWCLK | | ||
+ | | PB11 | 22 | 5 | SWIM | | ||
+ | | PA14 | 37 | 6 | JTMS/SWDIO | | ||
+ | | USB GND | | 7 | GND | | ||
+ | | PA5 | 15 | 8 | JTDO | | ||
+ | | PB6 | 42 | 9 | SWIM_RST | | ||
+ | | PA6 | 16 | 10 | JTDI | | ||
+ | | PB12,PB14 | 25,27 | | 100 ohms | | ||
+ | | PB5 | 41 | | LED | | ||
+ | |||
+ | the adapter pins are protected with a 220 ohms resistor. | ||
+ | |||
+ | ===== Altera USB-Blaster ===== | ||
The [[https:// | The [[https:// | ||
Line 133: | Line 193: | ||
</ | </ | ||
- | ===== tricks ===== | + | Now you can also use it, here with an STM32F1 micro-controller: |
+ | <code bash> | ||
+ | openocd --file interface/ | ||
+ | |||
+ | Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16: | ||
+ | Licensed under GNU GPL v2 | ||
+ | For bug reports, read | ||
+ | http:// | ||
+ | Warn : Adapter driver ' | ||
+ | Info : only one transport option; autoselect ' | ||
+ | adapter speed: 1000 kHz | ||
+ | adapter_nsrst_delay: | ||
+ | jtag_ntrst_delay: | ||
+ | none separate | ||
+ | cortex_m reset_config sysresetreq | ||
+ | Info : No lowlevel driver configured, will try them all | ||
+ | Info : usb blaster interface using libftdi | ||
+ | Error: unable to get latency timer | ||
+ | Info : This adapter doesn' | ||
+ | Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) | ||
+ | Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) | ||
+ | Info : stm32f1x.cpu: | ||
+ | </ | ||
+ | |||
+ | ===== SEGGER J-Link ===== | ||
+ | |||
+ | The [[http:// | ||
+ | |||
+ | {{: | ||
+ | {{: | ||
+ | {{: | ||
+ | |||
+ | It supports JTAG, SWD, SWO, RTCK, and voltage reference. | ||
+ | That makes it the most complete JTAG adapter I have. | ||
+ | |||
+ | ====== tricks | ||
- | ==== scan chain ==== | + | ===== scan chain ===== |
JTAG devices are called Test Access Points (TAP). | JTAG devices are called Test Access Points (TAP). | ||
Line 144: | Line 239: | ||
Thus it sometimes is useful to just list the TAPs available on a chain to know which devices are present. | Thus it sometimes is useful to just list the TAPs available on a chain to know which devices are present. | ||
- | This is easily done with urJTAG: | + | This is easily done with urJTAG |
<code bash> | <code bash> | ||
jtag | jtag | ||
Line 172: | Line 267: | ||
OpenOCD also scans the chain if no target is provided (the adapter still need to be defined): | OpenOCD also scans the chain if no target is provided (the adapter still need to be defined): | ||
<code bash> | <code bash> | ||
- | openocd --file interface/ | + | openocd --file interface/ |
+ | |||
+ | Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16:26) | ||
Licensed under GNU GPL v2 | Licensed under GNU GPL v2 | ||
For bug reports, read | For bug reports, read | ||
Line 178: | Line 275: | ||
Warn : Adapter driver ' | Warn : Adapter driver ' | ||
Info : only one transport option; autoselect ' | Info : only one transport option; autoselect ' | ||
- | adapter speed: 1000 kHz | ||
- | adapter_nsrst_delay: | ||
- | jtag_ntrst_delay: | ||
- | none separate | ||
- | cortex_m reset_config sysresetreq | ||
Info : No lowlevel driver configured, will try them all | Info : No lowlevel driver configured, will try them all | ||
Info : usb blaster interface using libftdi | Info : usb blaster interface using libftdi | ||
Error: unable to get latency timer | Error: unable to get latency timer | ||
Info : This adapter doesn' | Info : This adapter doesn' | ||
- | Info : JTAG tap: stm32f1x.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) | + | Warn : There are no enabled taps. AUTO PROBING MIGHT NOT WORK!! |
- | Info : JTAG tap: stm32f1x.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) | + | Info : JTAG tap: auto0.tap tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) |
- | Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints | + | Info : JTAG tap: auto1.tap tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) |
+ | Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 4 -expected-id 0x3ba00477" | ||
+ | Warn : AUTO auto1.tap - use "jtag newtap auto1 tap -irlen 5 -expected-id 0x16410041" | ||
+ | Warn : gdb services need one or more targets defined | ||
+ | </ | ||
+ | |||
+ | '' | ||
+ | |||
+ | While the ST-Link v2 is mainly meant to be used as SWD adapter, it also supports JTAG. Both are implemented with the High Level Adapter (HLA) driver. But it seems scan chain is [[http:// | ||
+ | <code bash> | ||
+ | openocd --file interface/ | ||
+ | |||
+ | Open On-Chip Debugger 0.10.0-dev-00189-g554313b (2016-01-12-16: | ||
+ | Licensed under GNU GPL v2 | ||
+ | For bug reports, read | ||
+ | http:// | ||
+ | hla_jtag | ||
+ | adapter speed: 100 kHz | ||
+ | Info : clock speed 100 kHz | ||
+ | Error: BUG: current_target out of bounds | ||
</ | </ |
jtag.txt · Last modified: 2024/01/07 17:49 by 127.0.0.1